OF: fdt: Machine model: Altera SOCFPGA Arria 10 CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache CPU: ARMv7 Processor revision 1 (ARMv7), cr=10c5387d Loading Device Tree to 09ff4000, end 09ffffdb. Retrieving file: /extlinux/./socfpga_arria10_socdk_sdmmc.dtb Loadmk Load device generated with mkimageįor loadmk operating on FIT format uImage address must includeĨ124456 bytes read in 399 ms (19.4 MiB/s)Īppend: root=/dev/mmcblk0p2 rw rootwait earlyprintk console=ttyS0,115200n8 Loadb Load device from bitstream buffer (Xilinx only) Warning: (eth0) using random MAC address - ee:f4:d5:a3:12:2fġ4981396 bytes read in 721 ms (19.8 MiB/s)įpga ĭump Load device to memory buffer Once the FPGA has been configured the green D18 LED will turn on and the boot process will continue. WDT: Started with servicing (10s timeout)Ĭonfiguring the FPGA will take a few seconds. įPGA: Start to program peripheral/full bitstream. After turning on the power switch the following messages should appear on the serial console.
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